The invention pertains to etching methods, such as, for example, methods of forming silicon nitride spacers.
A commonly utilized method for removing at least some of a material is plasma etching. Such method can be used, for example, in semiconductor processing. An enormous diversity of materials can be removed by appropriately adjusting etchant components and etching parameters. Among the materials that can be removed are polycrystalline silicon, silicon nitride and silicon oxides. Etchants that can be utilized for removing polycrystalline silicon include HCl, HBr, HI, and Cl2, alone or in combination with each other and/or one or more of He, Ar, Xe, N2, and O2. A suitable etchant that can be utilized for removing a silicon oxide, such as silicon dioxide, is a plasma comprising CF4/CHF3, or CF4/CH2F2. Additionally, a suitable etchant for removing silicon oxide is a plasma comprising a large amount of CF3, and a minor amount of CH2F3. A suitable etchant for removing silicon nitride is a plasma comprising CF4/HBr.
An example prior art reaction vessel 10 is illustrated in FIG. 1. Reaction vessel 10 comprises a plurality of sidewalls 12 surrounding an internal reaction chamber 14. Also, reaction vessel 10 comprises a radio frequency (RF) generating coil 16 surrounding a portion of reaction chamber 14 and connected to a first RF source 18. RF coil 16 is configured to generate a plasma within reaction chamber 14.
A substrate 20 is received within internal chamber 14 and connected to a second RF source 22. Second RF source 22 is configured to generate an RF bias at substrate 20. Additionally, reaction vessel 10 can comprise coolant coils (not shown) configured to cool a backside of substrate 20 and thereby maintain substrate 20 at a desired temperature during an etching process. It is to be understood that vessel 10 is an exemplary etching vessel. Other constructions are possible. For instance, reaction vessel 10 utilizes a cylindrical inductively driven source geometry, but planar or other inductively driven source geometries can be used. Also, reaction vessel 10 is shown utilizing two separate RF sources, 18 and 22, but other constructions can be used wherein a single RE source can be utilized and the RF power from such source split to form a first RE power at coil 16 and an RF bias at substrate 20.
Substrate 20 can comprise, for example, a monocrystalline silicon wafer. To aid in interpretation of the claims that follow, the term xe2x80x9csemiconductive substratexe2x80x9d is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term xe2x80x9csubstratexe2x80x9d refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
In operation, plasma gases (not shown) are flowed into internal chamber 14 and converted into a plasma by energy input from reaction coil 16. An RF bias is generated at substrate 20, and such RF bias draws plasma components to a surface of substrate 20 to etch a material at such surface.
During etching of a component from substrate 20, the materials produced by chemical reaction to the substrate with etch gases are released into the internal chamber. Such materials are referred to herein as etch reaction products, or as etchant debris. A method of determining when an etch has penetrated a material is to monitor the concentration of the evolved reaction products and/or etchant gases as the etch proceeds. Monitoring of the etchant debris can be accomplished by, for example, spectroscopic methods, including, for example, ultraviolet-visible spectroscopy and mass spectrometry. Preferably, the monitoring will be performed by an automated system, with software configured to detect when a concentration of a monitored material decreases within the etchant debris.
In the shown embodiment, a monitoring device 28 is provided to observe etchant debris within reaction chamber 14 through a window 26. Monitoring device 28 can comprise, for example, a spectrometer. The spectrometer can be configured to, for example, display a signal corresponding to a concentration of a particular component in the etchant debris, and/or to send such signal to an automated mechanism which performs a function in response to particular signal characteristics. An example automated system is a system comprising an algorithm to analyze the signal and determine from the analysis when an etch penetrates a particular material. The automated system can be configured to terminate the etching process in response to a determination that the etch has penetrated the particular material.
An etch will frequently be conducted in two distinct etching steps, particularly if the etching is to remove a thickness of material that is greater than or equal to 200 Angstroms. First, a highly physical (non-selective) etch is utilized to etch through the majority of a material. Second, a chemical-type etch (highly selective) is utilized to etch through a remainder of the material. A less selective (physical-type) etch generally has better center-to-edge uniformity than a more selective (chemical-type) etch. Center-to-edge uniformity can be understood by reference to FIG. 2 wherein a semiconductive wafer 40 is illustrated. Wafer 40 comprises an edge region 42 and a center region 44. Generally, an etch process will etch material from both edge region 42 and center region 44, as well as from regions intermediate edge region 42 and center region 44. Etching frequently progresses at a different rate at edge region 42 than at center region 44. Thus, as an etch progresses further into a material of semiconductive wafer 40, a disparity between etchant depth at center region 44 and edge region 42 becomes more pronounced. Center-to-edge uniformity is a measure of a degree of disparity between an etch rate at edge region 42 versus an etch rate at center region 44.
Physical-type etch processes generally have a high degree of center-to-edge uniformity, and therefore etch edge region 42 at about the same rate as center region 44. In contrast, chemical-type etches typically have a lower degree of center-to-edge uniformity, and accordingly etch edge region 42 at a significantly different rate than center region 44.
A reason for utilizing a physical-type etch initially in an etching process is to maintain a high degree of center-to-edge uniformity as the bulk of a material is etched. The etching process is then changed to a more chemical-type etch as a final portion of the material is removed to obtain a high degree of selectivity for the material relative to other materials that can be exposed during latter stages of an etch.
A chemical-type etch and a physical-type etch can utilize the same etchants but vary in power settings and pressures, or can utilize different etchants at either the same or different power settings and pressures. If the physical-type etch and chemical-type etch comprise the same etchants, the physical-type etch generally comprises a higher bias power at a substrate, and a lower pressure within a reactor than the chemical-type etch. For example, both chemical-type etching and physical-type etching of a silicon nitride material can utilize an etchant comprising CF4/HBr. However, the physical-type etching will utilize an RF power to primary RF coil 16 of from about 250 to about 800 watts, a bias power to substrate 20 of from about 75 to about 400 watts, and a pressure within internal chamber 14 of from about 5 to about 15 mTorr. In contrast, a chemical-type etch will utilize a power to primary RF coil 16 (FIG. 1) of from about 300 to about 900 watts, a bias power to substrate 20 of less than about 20 watts, and a pressure within internal chamber 14 of from about 40 to about 70 mTorr.
A difficulty in etching methods can occur during monitoring of etchant debris. For instance, a nitride spacer etch is described with reference, to FIGS. 3-5, with a semiconductor wafer fragment 50 illustrated before an etch (FIG. 4) and after the etch (FIG. 5), and a graph of nitrogen-containing components in debris from the etch shown in FIG. 3. In the before-etch-construction of FIG. 4, wafer fragment 50 comprises a substrate 52 having a transistor gate construction 54 formed thereover. Substrate 52 can comprise, for example, monocrystalline silicon lightly doped with a P-type dopant. Transistor gate structure 54 comprises a silicon dioxide layer 56, a polycrystalline silicon layer 58, a metal-silicide layer 60, and an insulative cap 62. Metal-silicide layer 60 can comprise, for example, titanium-silicide or tungsten-silicide, and insulative cap 62 can comprise, for example, silicon dioxide or silicon nitride. In the shown construction, silicon dioxide layer 56 extends beyond lateral peripheries of gate construction 54 and over an upper surface of substrate 52. A silicon nitride layer 64 is formed over silicon dioxide layer 56, as, well as over gate structure 54. In other constructions (not shown) an extent of silicon dioxide layer 56 can be limited to within the lateral peripheries of gate construction 54, and silicon nitride layer 64 can contact substrate 52 in regions beyond the lateral peripheries of gate construction 54.
Referring to FIG. 5, an etch is conducted to pattern silicon nitride layer 64 into sidewall spacers 66. The etching has selectively stopped at oxide layer 56. Preferably, insulative cap 62 comprises silicon dioxide so that the etch of nitride layer 64 also selectively stops at cap 62.
The etch of silicon nitride layer 64 comprises two distinct etch steps, an initial physical-type etch, and a subsequent chemical-type etch. The FIG. 3 graph of nitrogen composition in etchant debris, illustrates the intensity of a 386 nanometer signal obtained as a function of time. The 386 nanometer signal is associated with a C-N excitation. The physical-type etch forms a first peak region 70 of nitrogen-containing material in the etch debris, and the chemical-type, etch forms a second peak region 72 of nitrogen-containing material in the etch debris. A trough region 74 occurs between peak regions 70 and 72, and corresponds to a period of time wherein etching conditions within the reaction chamber are switched from physical-type etching conditions to chemical-type etching conditions.
A difficulty occurs in monitoring peak region 72 to ascertain the precise time at which nitride layer 64 (FIGS. 4 and 5) has been etched through to oxide layer 56 (FIGS. 4 and 5). Careful observation of peak region 72 reveals a break at a location labeled 76. Such break corresponds to a significant drop in nitrogen-containing species within an etch debris, and corresponds to the time at which the shown etch has penetrated silicon nitride layer 64. Although the break at location 76 can be discerned by a person viewing peak region 72, it is difficult to create software algorithms that can accurately detect break 76 on the overall peak-shape of peak region 72. Specifically, peak region 72 comprises a sloped trailing edge before the drop in nitrogen species occurring at location 76. Such sloped trailing edge effectively creates a sloping baseline upon which location 76 is to be identified. It is difficult to create software algorithms that can reproducibly discern a change on a sloping baseline. Accordingly, it is desirable to develop methods for substantially removing the sloping trailing edge of peak region 72.
In one aspect, the invention encompasses a method of removing at least a portion of a material from a substrate. The material is subjected to a first etching and a second etching in a reaction chamber. A component of the material is removed from at least one sidewall of the reaction chamber between the first etching and the second etching.
In another aspect, the invention encompasses a method of patterning a material over a semiconductive substrate. A layer of first material is formed against a second material and over a semiconductive substrate. The semiconductive substrate comprises a surface having a center and an edge. The first material is subjected to first etching in a reaction chamber. The first etching comprises a first center-to-edge uniformity across the surface of the wafer and comprises a first selectivity for the first material relative to the second material. The first material is subjected to second etching in the reaction chamber. The second etching comprises a second center-to-edge uniformity across the surface of the wafer and comprises a second selectivity for the first material relative to the second material. The second center-to-edge uniformity is less than the first center-to-edge uniformity, and the second selectivity is greater than the first selectivity. A component of the first material is cleaned from at least one sidewall of the reaction chamber between the first etching and the second etching.